1. Field of the Invention
The present invention relates to a laminated and sintered ceramic circuit board. Specifically, the present invention relates to a laminated and sintered ceramic circuit board having a fine-lined inner layer wiring. Further, the present invention also relates to a semiconductor package including the laminated and sintered ceramic circuit board.
2. Description of the Related Art
Responding to rising performance and downsizing of electronic devices and the like, market need to fast, downsized and short-in-height (thin) circuit element packages used in various electronic devices (for example, semiconductor packages such as IC packages and the like) have been going on increasing. As a result, in a circuit element (for example, a semiconductor element such as an IC chip, a resistive element, a capacitative element, an inductor element and the like) constituting a circuit element package, especially in a semiconductor element, demand for fast signal transmission, fine-lined (minute) pitch (interval) of wirings and a thin element goes on increasing.
Since wirings become narrow and the interval thereof becomes narrower in accordance with the faster signal transmission and fine-lined pitch of wirings in a semiconductor element as described above and therefore the influence of wiring capacity becomes more obvious, it is necessary to decrease the dielectric constant of insulating material between wirings on the surface of the semiconductor element. However, in general, insulating material with low dielectric constant is fragile and the strength of surface wiring tends to decrease in combination with fine-lined pitch of wirings. When the strength of surface wiring decreases thus, for example, by means of thermal stress due to the difference between coefficients of thermal expansion of a semiconductor element and a board to which the semiconductor element is joined, the breakdown of their joining part becomes more likely to occur. In addition, the thinner a semiconductor element becomes, the lower the mechanical strength of the whole semiconductor element necessarily becomes.
By the way, a semiconductor element is often joined to a board (package board) by means of, for example, flip-chip joining or the like to be configured as a circuit element package. On one surface of two principal surfaces of the package board, to which the semiconductor element is joined, terminals, lands and the like with a relatively narrow pitch corresponding to the wiring pitch of the semiconductor element fine-lined as described above are generally disposed. On the other hand, on the other surface of two principal surfaces of the package board, opposite to the side to which the semiconductor element is joined, terminals and the like with a relatively wide pitch corresponding to the wiring pitch of a circuit board (for example, a mother board and the like), to which the circuit element package is joined, are generally disposed.
In addition, a package board generally comprises a wiring consisting of a conductor embedded within the board (inner layer wiring). For example, the inner layer wiring connects the terminals on the two principal surfaces with each other. In this case, the inner layer wiring is generally configured so that the wiring pitch changes from a relatively narrow terminal pitch on the semiconductor element side to a relatively wide terminal pitch on the circuit board side. Namely, it can be said that the package board bears the function of conversion of the relatively narrow terminal pitch on the semiconductor element side into the relatively wide terminal pitch on the circuit board side. As a circuit element package as described above, for example, a BGA (Ball Grid Array) package, in which terminals on a circuit board side are configured as BGA balls (ball bumps), and the like can be exemplified.
As base material for the above-described board, resin such as glass epoxy is generally used. Therefore, its coefficient of thermal expansion is different from that of silicon constituting a semiconductor element, and problems such as breakdown of a joining part between a semiconductor element and a package board, due to thermal stress acting between the semiconductor element and the package board in association with temperature alteration that a circuit element package suffers from, for example, on soldering the semiconductor element to the package board by means of flip-chip joining or the like, soldering the circuit element package to the circuit board by means of BGA reflow, or the like, are concerned.
Accordingly, in the art, technology to interpose an intermediate board (interposer) between a semiconductor element and a package board and thereby disperse thermal stress as described above to a joining part between the semiconductor element and the intermediate board and a joining part between the intermediate board and the package board has been developed (for example, refer to Patent Document 1). However, demand for fast signal transmission, fine-lined wiring pitch and a thin element as mentioned previously goes on increasing more and more and accordingly problems such as breakdown of a joining part of a semiconductor element due to thermal stress acting on the joining part of the semiconductor element go on deepening more and more.
In addition, introduction of an intermediate board into a circuit element package leads to increase in thickness (elongation-in-height) of the circuit element package. Accordingly, in order to meet the market demand for a short-in-height (thin) circuit element package as mentioned previously, it is necessary to make the intermediate board as short-in-height (thin) as possible. However, as mentioned above, since a certain level of thermal stress acts on a joining part between a semiconductor element and an intermediate board, sufficient mechanical strength (rigidity) of the intermediate board cannot be maintained when the intermediate board is made thinner for the purpose of lowering the height of a circuit element package, and consequently problems such as warpage of the intermediate board may occur due to the thermal stress acting between the semiconductor element and the intermediate board.
In the art, as a countermeasure for such a problem, an approach to complement the rigidity of an intermediate board, for example, by disposing a reinforcing member around the intermediate board has been proposed (for example, refer to Patent Document 2). According to such a technology, deformation (for example, warpage or the like) of an intermediate board due to thermal stress acting between a semiconductor element and the intermediate board is suppressed. However, addition of such a reinforcing member may complicate the manufacturing process of a circuit element package and consequently lead to increase in the manufacturing cost of the circuit element package.
Accordingly, in order solve problems as mentioned above due to thermal stress acting between a semiconductor element and an intermediate board, it is desirable to sufficiently decrease thermal stress itself acting between the semiconductor element and the intermediate board. Therefore, in the art, a technology to interpose an intermediate board (interposer) with base material made of material (for example, silicon, glass or the like) having a coefficient of thermal expansion close to that of silicon constituting a semiconductor element has been developed. Thereby, thermal stress acting between the semiconductor element and the intermediate board can be decreased.
On the other hand, as mentioned previously, since the wiring pitch in a semiconductor element has become more and more remarkably fine-lined, in the art, an approach to make not only a package board, but also an intermediate board bear the function of conversion of the relatively narrow terminal pitch on the semiconductor element side into the relatively wide terminal pitch on a circuit board side has been made. Specifically, an intermediate board comprising a multilayer wiring layer with an inner layer wiring embedded therein and configured so that its wiring pitch changes from relatively narrow terminal pitch on a semiconductor element side to relatively wide terminal pitch on a circuit board side has been proposed.
However, since, in the above-described intermediate board with base material made of silicon, glass or the like, it is difficult to configure conductor having a complicated structure like the above-mentioned inner layer within the base material, in general, a through conductor (via hole) extending in its thickness direction (direction perpendicular to its principal surfaces) is formed in the base material, and a conductor having a complicated structure converting the wiring pitch is formed within a multilayer wiring layer consisting of material other than that of the base material, which is separately formed on the semiconductor element side of the base material.
It is known that the above-described multilayer wiring layer can be formed by means of thin film processes such as sputtering, chemical vapor deposition (CVD) and the like, and wafer processes including a microfabrication process through photolithography and etching and the like (for example, refer to Patent Document 2)
The configuration wherein a multilayer wiring layer separate from an intermediate board is disposed as described above may not only increase its manufacturing cost, but also lower its reliability (for example, temperature cycle reliability) due to detachment of the multilayer wiring layer from base material for example on repeated use or the like. In addition, since the mechanical strength of an intermediate board with base material of, for example, silicon, glass or the like, as well as a multilayer wiring layer disposed on its principal surface is low, when the thickness thereof is decreased for the purpose of making a circuit element package as mentioned previously short-in-height, a problem that the mechanical strength of the whole intermediate board decreases may occur.
As the above, in the art, demand for a circuit board with high reliability against temperature alteration and high mechanical strength has been existing as used to be.